So, I’m tinkering with the ATtiny 3224 and its PWM capabilities. I can get 256 bits of resolution per cycle at 78.125kHz.
If I drop to 32 bits, that gets me to 625kHz, as shown in the screenshot.
I’ve done some searching but I may not know the right term and I’m probably looking for a rule of thumb.
What sort of resolution do you need to regulate a DC/DC switch mode? (in this case a pure resistive load that doesn’t change)
I think it might be something like a factor for required percentage of change of switch ON time. Such as, you should generally be able to modify your duty cycle by increments of 5% or 0.5% or whatever for proper regulation.
Does this factor have a name?
Why not just use a low-pass filter to remove the switching frequency? Most regulator outputs are already buffered with a large capacitor to stabilize the voltage, so adding the inductor to form an LC circuit is not exactly adding much.
Why make this harder? A constant frequency simplifies the analog design, because you can do the bandwidth analysis once when verifying stability. A feedback loop that is statically and dynamically stable at one frequency might entirely fall apart at another frequency, because the frequency response of the regulator itself or the load may interact with the regulator frequency.
I’m struggling to see how this 20 MHz ATTiny would have so much trouble regulating a DC output that it needs to resort to rather strange techniques.
I mainly have experience on the TI MSP430 and ATMega328p, but both those microcontrollers have a robust PWM feature set that includes fixed waveforms that trigger an output whenever a value in memory is equal to the waveform. Such a value could also be the result of the ADC, meaning that zero CPU involvement is needed to keep regulation. That the ADC and PWM peripherals can be clocked independently from the CPU means this can all be done in the background, so the CPU can just go to sleep.
If the ATTiny3224 doesn’t have such capabilities, you would want to figure out another way to do things in the hardware peripherals – or even getting a different chip – than do regulation in software.
I wasn’t planning on variable frequency, you were speaking to the influence of frequency on voltage output earlier. I just meant that I could vary the frequency without messing up synchronization of the waves. I.E. I can produce two square waves of arbitrary duty and frequency up to 625kHz. The higher the frequency, the less resolution I have, however.
Anyhow, the output will be filtered with at least some fat caps. My load is a static resistance (heating element). I could probably drive this thing with a 555.
As far as I know, the Atmega328, at least, can’t use the ADC to bypass the CPU and directly set the timer registers. The ADC can throw an interrupt and then the CPU sets the timer. When your pwm frequency is sub 100kHz, there is plenty of time to change the duty.
I don’t know that I will need to vary the duty with logic. It’s just an idea I had that seemed neat. Quick coarse adjustment and then a fine tuned adjustment.
I’m teaching myself about SMPS, and I’m curious. While the final circuit will have utility. I’m really learning how to use a scope, the newer AVRs, and switch mode power.
Everything has switch mode in it now, my vehicles, my arc welder, every chunk of electroincs pretty much. It’s treated like a black box, buy the chip, follow the data sheet. However, if you want to build or fix one from first principles, good luck. Most approachable reference I’ve found is the DC/DC Book of Knowledge by Steve Roberts. And even it assumes that you’ll mostly be using an ASIC.
Generally, I come up with an idea in electornics or programming that is novel to me, somebody else figured it out decades ago. That’s why I’m wondering what you call the minumum pwm resolution and whatever this fast dumb logic adjustment to duty is.