Code run in a lightweight Virtual Machine can’t take advantage of the Efficiency cores of the host Apple silicon Mac. How then does Sonoma handle its threads?

One of the most distinctive features of Apple silicon chips is that they have two types of CPU core, E (Efficiency) cores that are energy efficient but slower than the P (Performance) cores, which normally run much of the code in the apps we use. Apps don’t decide directly which cores they will be run on, that’s a privilege of macOS, but they register their interest by setting a Quality of Service, or QoS, which is then taken into account when they’re scheduled to run. With the introduction of Game Mode in Sonoma, CPU scheduling can now work differently, with E cores being reserved for the use of games. This article looks at another atypical situation, when running a macOS virtual machine (VM) assigned a set number of virtual cores. How does macOS Sonoma handle that?

  • abhibeckert@lemmy.world
    3·
    1 year ago

    As far as I know not to the same degree? For example I’m pretty sure Apple’s efficiency cores don’t do speculative execution or at least don’t do much of it.

    AFAIK the x86 chips mostly just reduce the clock speed don’t they?

    • meseek #2982@lemmy.ca
      11·
      1 year ago

      x86-64 doesn’t need efficiency cores because unlike ARM, it doesn’t care about limiting power draw.

      ARM’s main appeal has always been ability to compute with minimal current (I think the first ARM processor consumed no power).

      • Skelectus@suppo.fi
        2·
        1 year ago

        I think the first ARM processor consumed no power

        Now that would be some efficiency aight.

        I recall something about operating on leak current alone, which is probability where you got that from.

          • Skelectus@suppo.fi
            1·
            1 year ago

            That can’t be quite right either, as it would be eaten immediately.

            I looked it up, most specific I could find is this quote:

            …leakage from the power rails leading to the I/O chip

            Not sure how accurate this is, but the power has to originate from something that is actively powered.